The present invention relates in general to semiconductor circuits and, more particularly, to interconnections within semiconductor circuits and methods of making the interconnections to have low resistance, reduced cross coupling and occupy reduced surface area.
A semiconductor circuit includes an array of devices which are interconnected by patterns of wiring lines formed of conductive material. As the devices are scaled to smaller and smaller dimensions, formation of reliable interconnects becomes more and more difficult since the wiring lines need to be formed to occupy less space. To this end, the wiring lines are reduced in width, but eventually they become so narrow that to reduce them further results in resistance levels of the lines being too great for reliable operation of the semiconductor circuit. Similarly, the spaces between the lines are reduced in width, but there is a minimum allowable spacing beyond which the coupling between the lines becomes too great for reliable operation of the semiconductor circuit.
To get around the problems of further reducing the width and spacing for wiring lines, the depth of the lines have been increased. A method of increasing the depth of the wiring lines is known as a damascene process named after the inlaid metal technique used in ancient Damascus to decorate swords and the like. In the damascene process, a series of channels are etched into a generally planar insulation layer and a layer of conductive material is then formed over the insulation layer to fill the channels and form conductive ribs which are coupled to contact locations beneath the insulation layer. A planarization is then performed, for example by chemical mechanical planarization (CMP), to separate the inlaid ribs from one another.
Unfortunately, wiring lines formed by a series of ribs, which are produced, for example, by the damascene process, have increased surface areas which increase the capacitive coupling between the lines. Accordingly, this solution of providing ever smaller area wiring lines is limited.
There is, thus, a need for improved interconnections for semiconductor circuits which will allow the wiring lines defining the interconnections to be formed within smaller surface areas than can be used with even the conductive ribs which are currently being utilized.